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1. Questions on cache tags, indices, and offsets a. Suppose we have a 64 KB, direct-mapped cache with 8 word blocks. Determine how many bits are required for the tag, index, and offset fields for a 32-bit memory address. b. If instead we use a 64 KB, 4-way set associative cache with 8 word blocks, how many bits will be required for the tag, index, and offset fields for a 32-bit address? c. What type of cache is shown below in problem 2? How many bits are required for this cache’s tag, index, and offset fields for a 32-bit memory address?

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